Performance Modeling, Benchmarking and Simulation 
of High Performance Computer Systems (PMBS15) 

held as part of ACM/IEEE Supercomputing 2015 (SC15), Austin, TX, USA

6th International Workshop in

9:00 - 9:30
Performance Evaluation of the IBM POWER8 system to Support Computational Neuroscientific Application Using Morphologically Detailed Neurons
[abstract] [paper]

Timothee Ewart, Stuart Yates, Francesco Cremonesi, Pramod Shivaji, Fabien Delalondre, Felix Schuermann
EPFL, Switzerland


9:30 - 10:00
Performance Analysis of OpenMP on a GPU using a CORAL Proxy Application
[abstract] [paper]

Gheorghe-Teodor Bercea, Carlo Bertolli, Samuel F. Antao, Arpith C. Jacob, Alexandre E. Eichenberger, Tong Chen, Zehrai Sura, Hyojin Sung, Georgios Rokos, David Applehans, Kevin O'Brien
IBM TJ Watson, United States of America


10:00 - 10:30
Coffee Break


10:30 - 11:00
Examining Recent Many-core Architectures and Programming Models Using SHOC
[abstract] [paper] [slides]

M. Graham Lopez, Jeremy S. Meredith, Philip C. Roth, Jeffrey S. Vetter
Oak Ridge National Laboratory, United States of America

Jeffrey Young
Georgia Institute of Technology, United States of America

Mitch Horton
JICS, United States of America


11:00 - 11:30
Automatic Loop Kernel Analysis and Performance Modeling With Kerncraft
[abstract] [paper]

Julian Hammer, Georg Hager, Jan Eitzinger, Gerhard Wellein
Erlangen Regional Computing Center, Germany


11:30 - 12:00
Techniques for Modeling Large-scale HPC I/O Workloads
[abstract] [paper] [slides]

Shane Snyder, Philip Carns, Robert Latham, Misbah Mubarak
Argonne National Laboratory, United States of America

Chris Carothers
Rensselaer Polytechnic Institute, United States of America

Huong Vu Thanh Luu
University of Illinois at Urbana-Champaign, United States of America

Surendra Byna, Prabhat
Lawrence Berkeley National Laboratory, United States of America


12:00 - 12:30
Characterizing Node Orderings for Improved Performance
[abstract] [paper] [slides]

Carl Albing
U.S. Naval Academy, United States of America


12:30 - 14:00
Lunch Break


14:00 - 14:30
Simulating Stencil-based Application on Future Xeon Phi Processor
[abstract] [paper] [slides]

Chitra Natarajan, Carl Beckmann, Anthony Nguyen, Tryggve Fossum
Intel Corporation, United States of America

Mauricio Araya-Polo, Detlef Hohl
Shell International Exploration and Production Inc., United States of America


14:30 - 15:00
ARMv8 Micro-architectural Design Space Exploration for High Performance Computing using Fractional Factorial
[abstract] [paper] [slides]

Roxana Rusitoru
ARM Ltd., United Kingdom


15:00 - 15:30
Coffee Break


15:30 - 16:00
Guided Profiling for Auto-Tuning Array Layouts on GPUs
[abstract] [paper] [slides]

Nicolas Weber, Sandra C. Amend, Michael Goesele
Technische Universität Darmstadt, Germany


16:00 - 17:00
Late-Breaking Research and Preliminary Techniques


16:00 - 16:20
Portable Power/Performance Benchmarking and Analysis with WattProf
[abstract] [paper] [slides]

Amir Farzad, Boyana Norris
University of Oregon, United States of America

Mohammad Rashti
RNET Technologies, Inc., United States of America


16:20 - 16:40
The Dashboard: HPC I/O Analysis Made Easy
[abstract] [paper]

Huong Luu, Amirhossein Aleyasen, Marianne Winslett, Yasha Mostofi, Kaidong Peng
University of Illinois at Urbana-Champaign, United States of America


16:40 - 17:00
Two-level Checkpointing and Partial Verifications for Linear Task Graphs
[abstract] [paper] [slides]

Anne Benoit, Aurélien Cavelan, Yves Robert, Hongyang Sun
Ecole Normale Superieure de Lyon and Inria, France






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